Below is a list of general guidelines that can assist during the design stages of your circuit boards for manufacturing. It covers several of the basic elements, such as trace widths, spacing, pad sizes, solder mask clearances, etc.
We at QualTech Circuits, Inc appreciate your business and hope to work towards a Long Term Partnership with you. The following general design guidelines may be used as a tool to ensure a seamless transition from design to finished product.
Standard Advanced Maximum layer Count
up to 24 layers
Minimum trace width ? oz copper
1 oz copper
2 oz copper
Minimum space ? oz copper
1 oz copper
2 oz copper
Minimum finished via hole size
Minimum finished via pad size
Maximum drill aspect ratio
8 to 1
10 to 1
Controlled impedance tolerance
Minimum thickness tolerance
+/-10% or .007?
+/-5% or .004?
Minimum finished boards thickness
Minimum Plated through hole tolerance
Minimum Non plated hole tolerance
Minimum routing tolerance
Minimum warpage tolerance
.010? / inch
Minimum solder mask clearance
Minimum internal clearance
Minimum dielectric spacing
Legend line width
1.Part Number and revision level.
2.Artwork revision information if it differs from the drawing information.
3.Outside board dimensions, including tolerances.
4.Finished thickness and tolerance.
5.A hole chart including: symbols, specify plated and or non-plated, hole diameters and tolerances. The symbol for each hole' size shall correspond with the symbol on the view of the board.
7.Dielectric spacing requirements.
8.Copper weight of each layer.
9.Type of laminate.
10.Type and Color of solder mask.
11.Final finished requirement.
12.Any additional mechanical dimension requirements.
Tenting Via holes:
If Liquid Photo Image (LPI) solder mask is required, we advise that the via holes not be tented. Tenting the via holes with LPI solder mask will result in the following problems: incomplete encapsulation of the via hole, exposed copper/metal on via holes, Solder on via hole pads and in holes, uncured solder mask in the holes, which result in peeling of LPI and trapping contamination inside the holes.
The solder mask pads for via holes can be made about 5 mils bigger than the via drill size. This will result in deposition of solder in the via holes, reduce the possibility of bridging problems during wave soldering operation.
If the via plugging is used to fill open holes with the solder mask to block air leakage during In Circuit Test, via plugged one side is the suggested.
PCMCIA Cards notes:
The most common thickness specified for these cards is 0.018 +/- 0.002 inches.
We prefer that you specify the maximum thickness, and suggest it should be 0.019 inches for memory, fax/modem cards. Also, the thickness shall be measured from mask to mask.
The pad sizes of via holes for outer layers should be at least 0.018 inches. This allows us to drill 0.010" holes. The minimum annular ring criterion of IPC-600E will not be met, but no breakout can be guaranteed. We prefer to do tear dropping (snow-man) to all the via pads. This will provide at least 3 mils annular ring where the trace connects to the via pads.
We hope the above mentioned design guidelines are of some help to you. If you need additional information or have any questions, suggestions please feel free to contact us at (408) 727-4125.